
Embedded SoPC Design with Nios II Processor and Verilog Examples
Pong P. ChuExplores the unique hardware programmability of FPGA-basedembedded systems, using a learn-by-doing approach to introduce theconcepts and techniques for embedded SoPC design with Verilog
An SoPC (system on a programmable chip) integrates a processor,memory modules, I/O peripherals, and custom hardware acceleratorsinto a single FPGA (field-programmable gate array) device. Inaddition to the customized software, customized hardware can bedeveloped and incorporated into the embedded system aswell--allowing us to configure the soft-core processor, createtailored I/O interfaces, and develop specialized hardwareaccelerators for computation-intensive tasks.
Utilizing an Altera FPGA prototyping board and its Nios IIsoft-core processor, Embedded SoPC Design with Nios II Processorand Verilog Examples takes a learn by doing approach toillustrate the hardware and software design and development processby including realistic projects that can be implemented and testedon the board.
Emphasizing hardware design and integration throughout, the bookis divided into four major parts:
* Part I covers HDL and synthesis of custom hardware
* Part II introduces the Nios II processor and provides anoverview of embedded software development
* Part III demonstrates the design and development of hardware andsoftware of several complex I/O peripherals, including a PS2keyboard and mouse, a graphic video controller, an audio codec, andan SD (secure digital) card
* Part IV provides several case studies of the integration ofhardware accelerators, including a custom GCD (greatest commondivisor) circuit, a Mandelbrot set fractal circuit, and an audiosynthesizer based on DDFS (direct digital frequency synthesis)methodology
While designing and developing an embedded SoPC can berewarding, the learning can be a long and winding journey. Thisbook shows the trail ahead and guides readers through the initialsteps to exploit the full potential of this emergingmethodology.
Rapid Prototyping of Digital Systems Quartus II …
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